인큐솔루션(주)

Credo

SERDES IP

Credo designs SErDes IP that optimally balances performance, power and the costs
and risks of the manufacturing process. Our unique, patented mixed signal architecture
has enabled us to design in mature fabrication processes yet deliver leading-edge
performace and power.

Product	Application	Function	Geometry	Signaling	Reach
IP5	Switch Fabric ASIC HPC ASIC AI ASIC	SerDes	5/4nm	112G PAM4 56G PAM4 28G NRZ	LR, MR, VSR, XSR LR, MR, VSR, XSR LR, MR, VSR, XSR
IP7	Switch Fabric ASIC HPC ASIC AI ASIC	SerDes	7/6nm	112G PAM4 56G PAM4 28G NRZ	XSR LR, MR, VSR, XSR LR, MR, VSR, XSR
IP12	Switch Fabric ASIC HPC ASIC AI ASIC	SerDes	16/12nm	112G PAM4 56G PAM4 40G PAM3 28G NRZ	LR, MR, VSR, XSR LR, MR, VSR, XSR LR, MR, VSR LR, MR, VSR, XSR
IP28	Switch Fabric ASIC	SerDes	28nm	28G NRZ	LR, MR

SERDES “CHIPLETS”

Core and analog logic may not always deploy at the same time, in the same
process. Credo's unique SerDes architecture makes it possible todeliver
cost and power-effective solutions in mature process nodes, making the
functionality available in chip form for integration with SoCs to overcome
the need for matching core logic and SerDes funtinality in the same
process node.

Product	Application	Function	Host Side / Reach	Line Side /Reach
Nutcracker	Switch Fabric ASIC AI ASIC Machine Learning 2.5D Silicon Interposer	DSP Retimer	32x112G PAM4 / XSR	32x112G PAM4 / MR+
BlueJay	Switch Fabric ASIC AI ASIC Machine Learning 2.5D Silicon Interposer	DSP Retimer	Low Power BoW /XSR	64x56G PAM4 / LR

제품소개

Credo

SERDES IP

SERDES “CHIPLETS”